1. Field of the Invention
The present invention relates to a method of manufacturing doping patterns, and more particularly, to a method of manufacturing doping patterns of semiconductor devices.
2. Description of the Prior Art
With the progress of highly-integrated ICs and device miniaturization, critical dimension of semiconductor device and width of shallow trench isolation (STI), which provides electrical isolation between the semiconductor devices, are subsequently decreased. And thus the semiconductor fabricating process such as the photolithography process has been challenged.
It is well-known the ICs are multi-layered structure constructed by different device patterns, which are defined by photolithography processes. Therefore, the photolithography process is always taken as one of the critical processes among the semiconductor techniques. With the progress of device miniaturization, the two essential elements of the photolithography process: photomask and photoresist are respectively challenged. The photomask has to face the problem of alignment while the photoresist has to face the problem between the material and the process. It is found that the patterned photoresists easily collapse due to the inferior adhesion. Therefore, ion implantation results are adversely affected, and thus production yield and process window are deteriorated. Such problem is found not only in the ion implantations for adjusting the Vtn and the Vtp, but also in the ion implantations for forming the NLDD, PLDD, the source/drain of NMOS and PMOS transistors. Therefore, a method for manufacturing doping patterns that is able to avoid abovementioned problems is still in need.